| ADC | AND | ASL | BCC | BCS | BEQ | BIT | BMI | BNE | BPL | BRK | BVC | BVS | CLC |
| CLD | CLI | CLV | CMP | CPX | CPY | DEC | DEX | DEY | EOR | INC | INX | INY | JMP |
| JSR | LDA | LDX | LDY | LSR | NOP | ORA | PHA | PHP | PLA | PLP | ROL | ROR | RTI |
| RTS | SBC | SEC | SED | SEI | STA | STX | STY | TAX | TAY | TSX | TXA | TXS | TYA |
FLAGS: N V Z C
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Immediate | ADC #$25 | $69 | 2 | 2 |
| Zero Page | ADC $25 | $65 | 2 | 3 |
| Zero Page, X | ADC $25, X | $75 | 2 | 4 |
| Absolute | ADC $2500 | $6D | 3 | 4 |
| Absolute, X | ADC $2500, X | $7D | 3 | 4* |
| Absolute, Y | ADC $2500, Y | $79 | 3 | 4* |
| Indirect, X | ADC ($25, X) | $61 | 2 | 6 |
| Indirect, Y | ADC ($25),Y | $71 | 2 | 5* |
*If page boundary is crossed, add 1 CPU cycle
FLAGS: N Z
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Immediate | AND #$25 | $29 | 2 | 2 |
| Zero Page | AND $25 | $25 | 2 | 3 |
| Zero Page, X | AND $25, X | $35 | 2 | 4 |
| Absolute | AND $2500 | $2D | 3 | 4 |
| Absolute, X | AND $2500, X | $3D | 3 | 4* |
| Absolute, Y | AND $2500, Y | $39 | 3 | 4* |
| Indirect, X | AND ($25, X) | $21 | 2 | 6 |
| Indirect, Y | AND ($25),Y | $31 | 2 | 5* |
*If page boundary is crossed, add 1 CPU cycle
FLAGS: N Z C
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Accumulator | ASL A | $0A | 1 | 2 |
| Zero Page | ASL $25 | $06 | 2 | 5 |
| Zero Page, X | ASL $25, X | $16 | 2 | 6 |
| Absolute | ASL $2500 | $0E | 3 | 6 |
| Absolute, X | ASL $2500, X | $1E | 3 | 7 |
FLAGS: N V Z
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Zero Page | BIT $25 | $24 | 2 | 3 |
| Absolute | BIT $2500 | $2C | 3 | 4 |
FLAGS: B
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Implied | BRK | $00 | 1 | 7 |
Causes a non-maskable interrupt (NMI) and increases PC+1. RTI will return to the address of the BRK+2
FLAGS: N Z C
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Immediate | CMP #$25 | $C9 | 2 | 2 |
| Zero Page | CMP $25 | $C5 | 2 | 3 |
| Zero Page, X | CMP $25, X | $D5 | 2 | 4 |
| Absolute | CMP $2500 | $CD | 3 | 4 |
| Absolute, X | AND $2500, X | $DD | 3 | 4* |
| Absolute, Y | CMP $2500, Y | $D9 | 3 | 4* |
| Indirect, X | CMP ($25, X) | $C1 | 2 | 6 |
| Indirect, Y | CMP ($25),Y | $D1 | 2 | 5* |
*If page boundary is crossed, add 1 CPU cycle
FLAGS: N Z C
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Immediate | CPX #$25 | $E0 | 2 | 2 |
| Zero Page | CPX $25 | $E4 | 2 | 3 |
| Absolute | CPX $2500 | $EC | 3 | 4 |
FLAGS: N Z C
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Immediate | CPY #$25 | $C0 | 2 | 2 |
| Zero Page | CPY $25 | $C4 | 2 | 3 |
| Absolute | CPY $2500 | $CC | 3 | 4 |
FLAGS: N Z
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Zero Page | DEC $25 | $C6 | 2 | 5 |
| Zero Page, X | DEC $25, X | $CE | 3 | 6 |
| Absolute | DEC $2500 | $CE | 3 | 6 |
| Absolute, X | DEC $2500, X | $DE | 3 | 7 |
FLAGS: N Z
FLAGS: N Z
FLAGS: N Z
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Immediate | EOR #$25 | $49 | 2 | 2 |
| Zero Page | EOR $25 | $CE | 2 | 3 |
| Zero Page, X | EOR $25, X | $55 | 2 | 4 |
| Absolute | EOR $2500 | $4D | 3 | 4 |
| Absolute, X | EOR $2500, X | $5D | 3 | 4* |
| Absolute, Y | EOR $2500, Y | $59 | 3 | 4* |
| Indirect, X | EOR ($25, X) | $41 | 2 | 6 |
| Indirect, y | EOR ($25), Y | $51 | 2 | 5* |
*If page boundary is crossed, add 1 CPU cycle
FLAGS: N Z
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Zero Page | INC $25 | $E6 | 2 | 5 |
| Zero Page, X | INC $25, X | $F6 | 2 | 6 |
| Absolute | INC $2500 | $EE | 3 | 6 |
| Absolute, X | INC $2500, X | $FE | 3 | 7 |
FLAGS: N Z
FLAGS: N Z
FLAGS: NONE
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Absolute | JMP $1800 | $4C | 3 | 3 |
| Indirect | JMP ($1800) | $6C | 3 | 5 |
FLAGS: NONE
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Absolute | JSR $1800 | $20 | 3 | 6 |
FLAGS: N Z
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Immediate | LDA #$25 | $A9 | 2 | 2 |
| Zero Page | LDA $25 | $A5 | 2 | 3 |
| Zero Page, X | LDA $25, X | $B5 | 2 | 4 |
| Absolute | LDA $2500 | $AD | 3 | 4 |
| Absolute, X | LDA $2500, X | $8D | 3 | 4* |
| Absolute, Y | LDA $2500, Y | $89 | 3 | 4* |
| Indirect, X | LDA ($25, X) | $A1 | 2 | 6 |
| Indirect, y | LDA ($25), Y | $B1 | 2 | 5* |
*If page boundary is crossed, add 1 CPU cycle
FLAGS: N Z
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Immediate | LDX #$25 | $A2 | 2 | 2 |
| Zero Page | LDX $25 | $A6 | 2 | 3 |
| Zero Page, Y | LDX $25, Y | $B6 | 2 | 4 |
| Absolute | LDX $2500 | $AE | 3 | 4 |
| Absolute, Y | LDX $2500, Y | $BE | 3 | 4* |
*If page boundary is crossed, add 1 CPU cycle
FLAGS: N Z
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Immediate | LDY #$25 | $A0 | 2 | 2 |
| Zero Page | LDY $25 | $A4 | 2 | 3 |
| Zero Page, X | LDY $25, X | $B4 | 2 | 4 |
| Absolute | LDY $2500 | $AC | 3 | 4 |
| Absolute, X | LDA $2500, X | $BC | 3 | 4* |
*If page boundary is crossed, add 1 CPU cycle
FLAGS: N Z C
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Accumulator | LSR A | $4A | 1 | 2 |
| Zero Page | LSR $25 | $46 | 2 | 5 |
| Zero Page, X | LSR $25, X | $56 | 2 | 6 |
| Absolute | LSR $2500 | $4E | 3 | 6 |
| Absolute, X | LSR $2500, X | $5E | 3 | 7 |
Shifts all bits right one place. Bit 7 is replaced by 0. Original bit placed in Bit-0 is placed in Carry
Example: 010110100 Carry: 0 becomes 001011010 Carry: 0
FLAGS: NONE
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Implied | NOP | $EA | 1 | 2 |
FLAGS: N Z
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Immediate | ORA #$25 | $09 | 2 | 2 |
| Zero Page | ORA $25 | $05 | 2 | 3 |
| Zero Page, X | ORA $25, X | $15 | 2 | 4 |
| Absolute | ORA $2500 | $0D | 3 | 4 |
| Absolute, X | ORA $2500, X | $1D | 3 | 4* |
| Absolute, Y | ORA $2500, Y | $19 | 3 | 4* |
| Indirect, X | ORA ($25, X) | $01 | 2 | 6 |
| Indirect, Y | ORA ($25), Y | $11 | 3 | 5* |
*If page boundary is crossed, add 1 CPU cycle
FLAGS: NONE
FLAGS: NONE
FLAGS: NONE
FLAGS: NONE
FLAGS: N Z C
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Accumulator | ROL A | $2A | 1 | 2 |
| Zero Page | ROL $25 | $26 | 2 | 5 |
| Zero Page, X | ROL $25, X | $36 | 2 | 6 |
| Absolute | ROL $2500 | $2E | 3 | 6 |
| Absolute, X | ROL $2500, X | $3E | 3 | 7 |
Shifts all bits left one place. Carry bit is shifted into Bit-0. Then Bit 7 is placed into Carry.
Example: 010110100 Carry: 1 becomes 101101001 Carry: 0
FLAGS: N Z C
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Accumulator | ROR A | $6A | 1 | 2 |
| Zero Page | ROR $25 | $66 | 2 | 5 |
| Zero Page, X | ROR $25, X | $76 | 2 | 6 |
| Absolute | ROR $2500 | $6E | 3 | 6 |
| Absolute, X | ROR $2500, X | $7E | 3 | 7 |
Shifts all bits right one place. Bit 7 is replaced by Carry. Original bit placed in Bit-0 is placed in Carry
Example: 010110100 Carry: 1 becomes 11011010 Carry: 0
FLAGS: NONE
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Implied | RTI | $40 | 1 | 6 |
FLAGS: NONE
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Implied | RTS | $60 | 1 | 6 |
FLAGS: N V Z C
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Immediate | SBC #$25 | $E9 | 2 | 2 |
| Zero Page | SBC $25 | $E5 | 2 | 3 |
| Zero Page, X | SBC $25, X | $F5 | 2 | 4 |
| Absolute | SBC $2500 | $ED | 3 | 4 |
| Absolute, X | SBC $2500, X | $FD | 3 | 4* |
| Absolute, Y | SBC $2500, Y | $F9 | 3 | 4* |
| Indirect, X | SBC ($25, X) | $E1 | 2 | 6 |
| Indirect, Y | SBC ($25), Y | $F1 | 2 | 5* |
*If page boundary is crossed, add 1 CPU cycle
FLAGS: NONE
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Zero Page | STA $25 | $85 | 2 | 3 |
| Zero Page, X | STA $25, X | $95 | 2 | 4 |
| Absolute | STA $2500 | $8D | 3 | 4 |
| Absolute, X | STA $2500, X | $9D | 3 | 5 |
| Absolute, Y | STA $2500, Y | $99 | 3 | 5 |
| Indirect, X | STA ($25, X) | $81 | 2 | 6 |
| Indirect, Y | STA ($25), Y | $91 | 2 | 6 |
FLAGS: NONE
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Zero Page | STX $25 | $86 | 2 | 3 |
| Zero Page, Y | STX $25, Y | $96 | 2 | 4 |
| Absolute | STX $2500 | $8E | 3 | 4 |
FLAGS: NONE
| Addressing Mode | Example Code | OPCODE Hex Value | OPCODE Length | CPU Timing |
|---|---|---|---|---|
| Zero Page | STY $25 | $84 | 2 | 3 |
| Zero Page, Y | STY $25, Y | $94 | 2 | 4 |
| Absolute | STY $2500 | $8C | 3 | 4 |
FLAGS: N Z
FLAGS: N Z
FLAGS: NONE
FLAGS: N Z
FLAGS: NONE
FLAGS: N Z
| Interrupt | Details |
|---|---|
| IRQ/BRK | Located at Memory Address $FFFE. This is used to signal the CPU to trigger an interrupt. |
| NMI | Located at Memory Address $FFFA-FFFB. This interrupt is used for V_Blank-ing. This gets the next frame of graphics ready to be presented onto the screen. |
| RESET | Located at Memory Address $FFFC. This interrupt points to the start of the code |
NOTE: Binary is read from left to right. Left most bit being your highest bit, right most bit being your lowest bit.
Exmaple: 1[7th] 0[6th] 1[5th] 1[4th] 1[3rd] 0[2nd] 0[1st] 1[0th] -
| Bit | Details |
|---|---|
| Negative (N): Bit 7 | Sets after Operation is completed. Highest bit is designated negative or postive with signed numbers. |
| Overflow (V): Bit 6 | ADC and SBC sets this flag if the signed result is invalid |
| B Flag: Bit 5 and 4 | This isn't so much a flag as much as it is a Register for interupts |
| Decimal (D): Bit 3 | There's not much use for this on the NES, but within other architectures utilizing 6502, it is set for binary-coded arithmetic instructions |
| Interrupt Disable (I): Bit 2 | All Interrupts except for NMI is disabled. SEI and CLI can set or clear this flag. When IRQ is triggered, the CPU will set this flag automatically, then returned by utilizing RTI. |
| Zero (Z): Bit 1 | Most instructions that have a value result, if the value is Zero, this flag is will be set. |
| Carry (C): Bit 0 | After ADC, this holds the carry result. SBC or CMP will set this flag if result doesn't have a borrow. Essentially a greater than or equal to. ASL, LSR, ROL, and ROR will set this bit after execution. Incrementing or decrementing a value will not affect this flag. |
| Registers | Details |
|---|---|
| Accumulator (A) | General purpose single byte-long arithmetic register. |
| Indexes X and Y | General purpose storage register. |
| Program Counter | Non-General Purpose register holds the next instruction to be executed |
| Stack Pointer | Non-General Purpose register holds the previous program request |
| Status Register | Non-General Purpose register holds the 6 bits used in the Status Flags |
| Address Range | Size | Details |
|---|---|---|
| $0000-$07FF | $0800 | 2KB internal RAM |
| $0800-$0FFF, $1000-$17FF, $1800-$1FFF | $0800 (each) | Each of these three all mirror $0000-$07FF |
| $2000-$2007 | $0008 | NES PPU (Picture Processing Unit) registers |
| $2008-3FFF | $1FF8 | Mirrors of $2000-$2007 repeating every 8 bytes |
| $4000-$4017 | $0018 | NES APU (Audio Processing Unit) and I/O (Input/Ouput) Registers |
| $4018-$401F | $0008 | NES APU (Audio Processing Unit) and I/O (Input/Ouput) functionality (normally disabled) |
| $4020-$4020 | $BFE0 | Cartridge Space: PRG ROM (Program/Game Code), PRG RAM (Program/Game RAM), and Mapper Registers |